Acrosser Technology 486DX2 Guia do Utilizador

AARR--BB11332200 UUsseerr’’ss GGuuiiddee I AR-B1320 PC/104 386SX CPU BOARD User’s Guide Edition: 1.3 Book Num

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 2-2 2.3 DRAM CONFIGURATION There are two 16-bit memory banks on the AR-B1320 board. The first bank is em

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 2-3 2.5 I/O PORT ADDRESS MAP Hex Range Device Factory Preset 000-01F DMA controller 1 ✓ 020-021 In

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 2-4 2.6 INTERRUPT CONTROLLER The ALI M6117C also provides two-cascaded 8259 Programmable Interrupt Contro

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 2-5 2.7 SERIAL PORTS The ACEs (Asynchronous Communication Elements ACE1 and ACE2) are used to convert the

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 2-6 (5) Line Control Register (LCR) Bit 0: Word Length Select Bit 0 (WLS0) Bit 1: Word Length Select Bit

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 2-7 (9) Divisor Latch (LS, MS) Byte Data LS MS Bit 0: Bit 0 Bit 8 Bit 1: Bit 1 Bit 9 Bit 2: Bit

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 2-8 (3) Data Swapper The system microprocessor can read the contents of the printer's Data Latch thr

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 2-9 2.9 TIMER The AR-B1320 provides three programmable timers, each with a timing frequency of 1.19 MHz.

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 2-10 2.10 REAL-TIME CLOCK AND NON-VOLATILE RAM The AR-B1320 contains a real-time clock compartment that

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 2-11 2.11 WATCHDOG TIMER The AR-B1320 is equipped with a programmable time-out period watchdog timer. Act

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 2 II Copyright Notice and Disclaimer August 1999 This document is copyrighted, 1999, by Acrosser Technolo

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-1 3. SETTING THE SYSTEM This section describes the pin assignments of all connectors and settings of

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-2 3.1 BOARD LAYOUT The AR-B1320 is a small, easy to use, all-in-one 386SX grade CPU board with 2 RS-232

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-3 Name Function Section JP1 CPU base clock select 3.2 JP2 RS-485 terminator select (COM-A) 3.11.3

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-4 3.2 CPU BASE CLOCK SELECT (JP1) This board provides six types of CPU input clocks; they are 33.3MHz,

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-5 3.5 KEYBOARD CONNECTOR (J2) The J2 is a 6-pin 2.0mm JST connector. Use the keyboard adapter cable

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-6 3.8 POWER CONNECTOR (J5) The J5 is a 4-pin, 2.5mm, right angle JST connector; you can directly conne

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-7 3.10 FLOPPY CONNECTOR (CN2) The AR-B1320 provides a 16-pin 2.0mm connector (CN2) to support one flop

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-8 3.11.1 RS-232C CONNECTORS (CN3 & CN4) CN3 is the RS-232C- interface connector of COM-A port and

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-9 3.11.3 RS-485 TERMINATOR (JP2 & JP3) JP2 & JP3 are used to enable the RS-485 terminator resi

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-10 3.13 PC/104 CONNECTOR (CN7 & CN8) The AR-B1320 CPU board has the stack-through expandable featu

AARR--BB11332200 UUsseerr’’ss GGuuiiddee

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-11 3.13.3 PC/104 CHANNEL SIGNAL DESCRIPTION Name I/O Description BUSCLK [Output] The BUSCLK signal

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-12 3.14 LED INDICATOR (LED1 & LED2) AR-B1320 provides 2 on-board LEDs; one is power LED and the ot

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-13 The following table illustrates the flash rate information. FR-Data Flash Rate (Hz) Remark 0fh 2

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-14 3.15.2 WD REPORT REGISTER - INDEX 38H This register is used to select the watchdog report when the

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-15 3.15.4 TIMEOUT STATUS & RESET WATCHDOG - INDEX 3CH 0: Timer timeout not happened Bit 7(read o

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-16 (4) Write Data to Configuration Register Example 1: Write data 68h to INDEX 3Bh Unlock_Cfg_Reg ;

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-17 3.16.1 SSD CONFIGURATION The SSD function enables you to use 5V FLASH, allowing you to directly prog

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 3-18 3.16.3 DISKONMODULE AR-B1320 provides DiskOnModule function, which is interfaced with the 44-pin har

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 4-1 4. BIOS CONSOLE This chapter describes the AR-B1320 BIOS menu and explains how to perform the commo

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 4-2 CAUTION: 1) The factory-default settings are set according to the <Auto C

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 4 IV 3.15.3 WD TIMER COUNTER(24 bits) - INDEX 39H, 3Ah, and 3bH...

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 4-3 Hard Disk Setup The BIOS not only supports various types for the user settings but also supports <

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 4-4 4.3 ADVANCED CMOS SETUP The <Advanced CMOS SETUP> option consists of configuration entries tha

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 4-5 BootUp Num-Lock This item is used to activate the Num-Lock function upon system boot. If the setting

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 4-6 C000, 32k Shadow C800, 32k Shadow D000, 32k Shadow D800, 32k Shadow These options control the loc

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 4-7 4.4 ADVANCED CHIPSET SETUP This option controls the configuration of the board’s chipset. The contr

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 4-8 I/O Recovery/ I/O Recovery Period If I/O Recovery Feature options is enabled, the BIOS inserts a dela

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 4-9 4.5 PERIPHERAL SETUP This section is used to configure the peripheral features. Figure 4-5 BIOS: P

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 4-10 OnBoard Serial Port2 IRQ This option selects the IRQ for the onboard serial port2. Available options

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 4-11 4.9 LOAD THE DEFAULT SETTING This section permits you to select a group of settings for all BIOS Se

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 4-12 4.11 BIOS UPDATE The BIOS program instructions are contained within the computer chips called FLASH

AARR--BB11332200 UUsseerr’’ss GGuuiiddee

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 5-1 5. APPENDIX 5.1 SPECIFICATIONS CPU & Chipset: ALI M6117C, 33/40 MHz Bus Interface: PC/104 bus

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 5-2 5.2 SUPPORTED FLASH MEMORY The AR-B1320 supports small page 5V Flash memory listed as follows: Bran

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 5-3 5.3 BOARD DIMENSIONS 125*53625210321240537752380500200155011502001350 150030035075752503550335027952

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 5-4 5.4 PROGRAMMING THE RS-485 The majority of the communicative operations of the RS-485 are the same a

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 5-5 (4) Receive data The RS-485 operation of receiving data is the same as RS-232’s. (5) Basic Language

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 6 VI 0.5 ORGANIZATION This information covers the following topics (see the Table of Contents for a detail

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 1-1 1. OVERVIEW This chapter provides an overview of your system features and capabilities. The follow

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 1-2 1.3 FEATURES This system provides a number of special features that enhance its reliability, ensure i

AARR--BB11332200 UUsseerr’’ss GGuuiiddee 2-1 2. SYSTEM CONTROLLER This chapter describes the major structure. The following topics are covered: